#119 (ADDSD instruction is mis-implemented) – The Yasm Modular Assembler Project
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Ticket #119 (closed defect: fixed)

Opened 3 years ago

Last modified 2 years ago

ADDSD instruction is mis-implemented

Reported by: wml@… Owned by:
Priority: P1 Milestone:
Component: Architecture: x86 Version: 0.6.0
Severity: normal Keywords: addsd, x86
Cc:

Description

According to Intel (in the Architecture Manual), the ADDSD instruction takes an XMM register as the destination operand (op 1) and another XMM register or a pointer to a 64-bit memory location in the source operand (op 2). Yasm, right now, will take an XMM register or a 128-bit memory pointer for op 2.

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Change History

comment:1 Changed 3 years ago by peter

  • Status changed from new to closed
  • Resolution set to fixed

(In [2015]) Fix #119. Quite a few SSE/SSE2 instructions assumed 128-bit memory sizes instead of the correct 64-bit or 32-bit sizes (e.g. xmm/m64 or similar). It worked fine when no memory size was specified, but it should also work with the correct size modifier.

comment:2 Changed 3 years ago by wml@…

Great! Thanks muchly.

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